Title:

IC Design Engineer - 90nm/ 0.13um

Location:

Avon

Salary:

None specified

Description:

IC DESIGN ENGINEER WITH BIAS TOWARDS TIMING ANALYSIS EXPERIENCE SORTOur client seeks a self-motivated Staff Design Engineer to work in their design centre on leading edge DSL CO chips including high-speed processor design, new IP core creation and integration of the worlds leading IP. You will contribute to 90nm physical implementation methodology and chip-level TA of large SoCs. Reporting to the physical Build Team Leader, you will own all aspects of IP core implementation including TA, chip-level integration, logical and physical synthesis, crosstalk and signal integrity analysis, P&R etc and occasionally extend your experience into front-end work. They are looking for a physical implementation engineer with experience of full synthesis to GDS flow including 4 years+ in IC design, able to contribute to defining a new 90nm physical implementation methodology for high speed processor and SoC design, define/lead TA activity on a large SoC design including multiple in-house designed processor cores as well as externally sourced IP. Previous experience of chip level TA work, preferably using Synopsys Primetime and 0.13um circuit level design techniques essential. Familiar with crosstalk timing/signal integrity issues. Knowledge of 90nm design flows/methods and Magma physical design tools. You have the flexibility to move between all physical design activities.