Title:

Digital IC Design Engineer DSL chips needs TA

Location:

Bristol

Salary:

Competitive salary

Description:

at least 4 years experience in IC design- self-motivated- good communication skills and able to work well in a small team- able to contribute to defining a new 90nm physical implementationmethodology for high speed processor and SoC design.- able to define and lead TA activity on a large SoC designincluding multiple in-house designed processor cores as well asexternally sourced IP- previous experience of chip level TA work essential, preferably using Synopsys Primetime- flexible to move between all physical design activities as required- experience of 0.13um circuit level design techniques essential- familiar with crosstalk timing and signal integrity issues- knowledge of 90nm design flows and methods would be an advantage- Knowledge of Magma physical design tools, Perl & TCL scripting would be usefulDescription : Working in a design centre of ~30 people on leading edge DSL CO chipsincluding high-speed processor design, new IP core creation andintegration of the world's leading IP. Main duties will becontribution to 90nm physical implementation methodology and chip-levelTA of large SoC's. Reporting to the physical build team leader. Thecandidate will have the opportunity to own all aspects of IP coreimplementation including TA, chip-level integration, logical andphysical synthesis, crosstalk and signal integrity analysis, P&R, etc.There will also be the occasional opportunity to extend experience intofront-end work.